Embedded HardCopy Blocks and 28 Gbps transceivers

By Altera Corporation

As technology grows, chip sizes, of course Ö shrink. And FPGAs are no exception to this Mooreís Law-motivated phenomenon. Take Alteraís new 28-nm FPGAs, for example, to be incarnated with a little help from the companyís two recent innovations: Embedded HardCopy Blocks and embedded 28 Gbps transceivers. First, the Embedded HardCopy Blocks are slated to provide a new partial reconfiguration method. Partial reconfiguration means that designers can reconfigure some FPGA portions at the same time as other sections continue running, increasing system uptime without service disruption. Partial reconfiguration enabled by Embedded HardCopy Blocks will also improve logic densityís effectiveness by allowing external memory storage of FPGA functions not presently needed ñ but which can be uploaded later when required ñ to free up board space and lower power consumption. Second, Alteraís 28 Gbps embedded transceivers, which will ride inside the companyís new 28 nm FPGAs, allow 400G system designs on a single chip and thereby eliminate the need for expensive external components. Sounds like a good deal to us.

Embedded HardCopy Blocks and 28 Gbps transceivers

FEATURES

  • Provide a new partial reconfiguration method
  • Partial reconfiguration will improve logic density's effectiveness by allowing external memory storage of FPGA functions not presently needed
  • 28 Gbps embedded transceivers
  • 28 nm FPGAs
  • 400G system designs on a single chip

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