Cyclone III LS

By Altera Corporation

With 200K logic elements, Alteraís new Cyclone III LS achieves an impressive static power figure of 0.25 W, but thatís not quite the whole story. The family also brings in new features not seen before at such a low power point ñ antitamper and design security as well as design separation. Designers looking for IP protection can get it now. The path from the FPGA to flash is 256-bit AES encrypted, and the JTAG port can be disabled. Using an on-chip oscillator, the device runs a CRC to check that it isnít being reconfigured, and if it is being tampered with, the device will zeroize. In design separation (learn more about this in the July 2009 issue of Industrial Embedded Systems), single-chip redundancy is implemented with completely isolated partitions protected from data leaks. While this doesnít solve all the problems (like external power disruption), it does allow a single device to do many jobs that previously required two, saving 50 percent power and board space right away.

FEATURES

  • Achieves a static power figure of 0.25 W
  • Antitamper and design security as well as design separation
  • The path from the FPGA to flash is 256-bit AES encrypted, and the JTAG port can be disabled
  • Using an on-chip oscillator, the device runs a CRC to check that it isn't being reconfigured, and if it is being tampered with, the device will zeroize
  • In design separation, single-chip redundancy is implemented with completely isolated partitions protected from data leaks, allowing a single device to do many jobs that previously required two, saving 50 percent power and board space right away

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