Nios II, Cyclone

By Altera Corporation

Optimized for low cost, extending the reach of FPGAs further into cost-sensitive, high-volume applications

Nios II, Cyclone

FEATURES

  • Customer-defined feature set, industry-leading performance, and low power consumptio
  • Greatly increased density and more features, all at significantly lower cost
  • 150 embedded 18 x 18 multipliers
  • Can be used alone or as digital signal processing (DSP) coprocessors to improve price-to-performance ratios for DSP applications, including video and image processing, communications systems, and common DSP functions
  • Variety of intellectual property (IP) cores to speed development, including three Nios II 32-bit RISC processors
  • Optimized for a specific price and performance range, allowing designers to choose a system configuration that is an exact fit for their embedded needs
  • Upgrade system performance at any stage of the product life cycle without having to redesign the board or develop hand-optimized software
  • All three processors use the same instruction set architecture and are 100 percent binary code compatible. Nios II processors can be added to a designer's system using the SOPC Builder system development tool in the Quartus II development software
  • The Nios II C-to-Hardware Acceleration (C2H) Compiler boosts performance of time-critical C subroutines, converting them to powerful hardware accelerators with a simple “right-click to accelerate" interface
  • Includes 12 months of upgrades
  • Now RoHS-compliant.

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