By Altera Corporation


  • A Reed-Solomon encoder/decoder IP core
  • Adds parity symbols to the data stream prior to its transmission over a communications channel, determines if there are errors present and corrects them, if possible
  • Fully parameterizable through the MegaWizard plug-in feature
  • Allows user to generate valid field polynomials and create test vectors, based on the parameters
  • Delivered with a compiled VHDL RTL model

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