Nios II Dev. Kit S

By Altera Corporation

FEATURES

  • Cyclone II EP2C35F672 device
  • MAX® EPM7128AE CPLD configuration control logic
  • 1-Mbyte synchronous SRAM
  • 16-Mbyte DDR SDRAM
  • 16-Mbyte Flash memory
  • EPCS64 serial configuration device (64 Mbit)
  • CompactFlash connector header for Type I CompactFlash cards (40 available user I/O pins)
  • 10/100 Ethernet physical layer/media access control (PHY/MAC)
  • Ethernet connector (RJ-45)
  • One serial connector (RS-232 DB9 port)
  • Two expansion/prototype headers (2 x 41 available user I/O pins)
  • JTAG connectors for FPGA and CPLD
  • Mictor trace/debug connector
  • One set PMC headers (32 bit)
  • Four user-defined push-button switches
  • Eight user-defined LEDs
  • Dual 7-segment LED display
  • Power-on reset circuitry

See also:

Flag/report this product